Attention dcc: shroud of mystery around the stupid amplifier question solved!!!

[Mao]

2006 VCAA Unit 3 Exam:
http://www.vcaa.vic.edu.au/vce/studies/physics/pastexams/2006/physics1w06.pdf
Electronics section 3:

discussion found at: http://www.vicphysics.org/forum/showthread.php?t=172&page=6

a Pro-VCAA solution:

Well some sites such as "this site has it wrong" by my reckoning and even the Vcaa is not quite right in it's answer, although close.

Q3 has i/p signal as a 1.5Vpeak signal thus change in Vout is .15 x 200 = 30Vpeak or 60Vpp. Thus the amp is driven to saturation, when?

If Vcollector is 12v then Vat output (past de-coupler cap) is 0V. If change in I/p is .15Vp then amp is driven to cut-off (inverse operation). Cut off will be, (allowing for Vbe and Vcb drop of around .8V) 12-.8 = -11.2volts (inverse of course).

That’s fully ideal operation (if not simple in description), but, for simplistic operation Vcaa has determined cut-off to be -12V (disregarded the Vbe and Vcb influences).

The amp is driven into saturation, (by -ve half cycle i/p) when Vi/p is -.15 x 200 = -30V. The amp is only capable of 20V o/p (remember it's inverse to i/p). Thus it saturates at 8v above Vc (12V + 8V = 20V saturation). At the other side of the de-coupling cap this will seen as a be +8V change.

Thus you will see a square-ish wave of +8V to around -12V (although by my reckoning this -12v could be around -11.2V)

ahhh...not....quite...right!

The amp is driven to saturation with +ve half cycle of i/p, not cut off, as i stated. This is because Vcollector is 12V bias and .15x-200 = -30V. Because the amp is single stage it's inverse thus o/p (past decoupler) is driven to -12V, amp fully on.

However, the Vbe, Vbc and Re do drop some voltage thus it will not reach -12V, but, for simplistic reasons this is ignored.

The amp reaches cut off during the -ve half cycle of i/p, not saturation, as i stated. This is because Vcollector is 12V bias and .-15x-200 = 30V. But the amp can only reach 20V at Vc (point 3) the Vcc Voltage, thus it is fully cut off and drives to 20V, which is seen as a +8V change past decoupler.


Sorry for the confusion i couldn't edit my post and had had a few when i posted it. Tha'll teach me to make a fool of myself.

until this decisive last post came through:

The AIP Education Committee spent some time discussing the answer to this question and checked our understanding with a university lecturer of electronics engineering.

Because of the biasing of the transistor and the presence of the emitter resistor and capacitor, the voltage between the collector and the ground will be about 3.5V. This gives a peak to peak output voltage of 16.5 volts, which has been confirmed by measurements.

The other difficulty with the VCAA answer is that since the effect of the decoupling capacitor is to remove the average DC component from the voltage signal, this means that the output from the capacitor must be symmetrical about zero. Although this is only a very good approximation as the linearity of the response at cutoff and saturation are slightly different so the two halves of the square wave output are not exactly identical.

which only makes sense because the capacitor has to have a potential difference [its AC signal, it doesnt have a chance to discharge fully]

I shall slap myself next time i doubt your dad's words

but
it was overall a crap paper, apparently they've majorly stuffed up the further electronics section due to a leaked stem... etc~

ahhh~ i feel so relieved

[dcc]

It was indeed a poor exam.  Questions were just BLATANTLY wrong, missing circuit elements (which made the questions impossible unless you assumed the missing element was there), just a poor exam.  My physics teacher told me that lots of people were put off physics after seeing that particular exam.

[Mao]

Australian Institute of Physics

Saturation
When the collector current increases, the voltage drop across hte collector resistor increases and so the collector voltage decreases to the point where the collector voltage cannot decrease any more. If there is no emitter resistor this voltage is close to 0.5V, and could be considered as zero. If there is an emitter resistor with a capacitor parallel in the circuit, the emitter voltage is about 0.7V below the base voltage, and the lowest collector voltage is about 0.2 above that of the emitter voltage.

that definitely settles it =]

[Mao]

This is what should be the case:

the npn transistor requires a voltage at V_BE to operate [just like a diode has an operating voltage]
this voltage across Base-Emitter is roughly 0.7 V. Hence at saturation [transistor working as a closed switch]

we also know that
and the base voltage in this case, is our operating point.
Hence V_E will be at a mean of V_B-V_BE = 4-0.7=3.3V

at saturation, V_B is maximum, 4 + 0.15V = 4.15V
making V_E = 4.15 - 0.7 = 3.45V ~3.5V

since also at saturation CE [collector emitter] is 0 [transistor is acting like a closed switch], and V_E is parallel to V_out, we can safely say that the lowest it can go is ~3.5V, and the maximum is 20V

that, passed through the collector capacitor [mean DC voltage of 12], will result in clipping at +8 and -8.5. For the sake of VCELand, we make that

the answer is NOT +8 -12, VCAA is crapped themselves in this one.

[bigtick]

Pro VCAA

The solutions supplied by VCAA are based on idealised situations and what students are required to know as specified in the study design.

Hence the V(out)-V(in) characteristics of the transistor, with no capacitors, ranges from 0 to 20V approx., and the DC component of the output voltage removed by the de-coupl capacitor is taken as the biased voltage.

[Mao]

Pro VCAA

The solutions supplied by VCAA are based on idealised situations and what students are required to know as specified in the study design.

Hence the V(out)-V(in) characteristics of the transistor, with no capacitors, ranges from 0 to 20V approx., and the DC component of the output voltage removed by the de-coupl capacitor is taken as the biased voltage.

but there's a Earth capacitor that cannot be ignored. saturation is when Vout~V_B
VCAA should not punish anyone with the theoretically correct answers, VCELand appplied in this way is just stupid [i'd like a magically disappearing 3.5V too]

the idealised situation here is when there's no components at Emitter. which there is.

[dcc]

Pro VCAA

The solutions supplied by VCAA are based on idealised situations and what students are required to know as specified in the study design.

Hence the V(out)-V(in) characteristics of the transistor, with no capacitors, ranges from 0 to 20V approx., and the DC component of the output voltage removed by the de-coupl capacitor is taken as the biased voltage.

Let us first assume that gives us transistor saturation (i.e. the transistor is acting as a closed switch, so there is a very small voltage drop across ).  This output voltage corresponds to an input voltage of .

We know that:

We also know that:

Equating these, we get:



When , (as all the voltage is dropping across the Collector Resistor, as this transistor is SATURATED)

(since )

.  Yet this transistor is supposed to be saturating (i.e. acting as a closed switch, very little voltage drop), and has such a large voltage drop across it! contradiction!

If you consider the minimum () then the voltage drop across acts much more like a saturated transistor (closed switch).

[Captain]

VCAA should not punish anyone with the theoretically correct answers, VCELand appplied in this way is just stupid [i'd like a magically disappearing 3.5V too]

I heard they gave marks to people with the theoretically correct answer, and the correct answer.

No punishments were made. [from what I heard]

[Mao]

VCAA should not punish anyone with the theoretically correct answers, VCELand appplied in this way is just stupid [i'd like a magically disappearing 3.5V too]

I heard they gave marks to people with the theoretically correct answer, and the correct answer.

No punishments were made. [from what I heard]

that is AWESOME

[Collin Li]

I did this exam. I just did (or was it 30) on my graph, totally oblivious to the complexity of the problem.

No one got full marks for that paper (not a single person!).